FIG. 1A shows a schematic diagram of a traditional phase-locked loop circuit, and FIG. 1B shows a timing diagram of signals in the phase-locked loop circuit. The phase-locked loop circuit 10 comprises a phase/frequency detector 12, a charge pump 14, a low pass filter 16 and a voltage-controlled oscillator 18. Generally, the phase-locked loop 10 utilizes the phase/frequency detector 12 to detect a phase difference between a reference clock S1′ and a feedback clock S2′, and then utilizes the charge pump 14 to receive a first phase signal Sd1′ and a second phase signal Sd2′ to generate a current signal Sa′ corresponding to the phase difference, wherein the phase signals Sd1′ and Sd2′ are represented in a pulse wave format. When the reference clock S1′ leads the feedback clock S2′, the first phase signal Sd1′ of the phase/frequency detector 12 is at a high voltage level and the second phase signal Sd2′ of the phase/frequency detector 12 is at a low voltage level. In contrast, when the feedback clock S2′ leads the reference clock S1′, the first phase signal Sd1′ is at the low voltage level and the second phase signal Sd2′ is at the high voltage. However, due to the nature of the response time in the charge pump 14 when converting the phase signals Sd1′ and Sd2′ to the current signal Sa′, the charge pump 14 may not faithfully generate the current signal Sa′ to have a pulse wave format. Thus, the traditional charge pump 14 usually comprises a current adjusting circuit for adjusting the current signal Sa′ generated by the charge pump 14, so that the current signal Sa′ can have a similar format compared to the phase signals Sd1′ and Sd2′. When the current signal Sa′ has a pulse wave format, it means that the current signal Sa′ has high frequency components. Therefore, the low pass filter 16 coupled to the output of the charge pump 14 needs to have the ability of filtering out the high frequency components of the current signal Sa′ to generate a control signal Scon′ with low frequency to the voltage-controlled oscillator 18. In other words, the low pass filter 16 must be a multi-pole filter, which generally occupies a large circuit area and is more difficult to set.
As mentioned above, the current adjusting circuit not only adds circuit area to the phase-locked loop circuit 10 but also adds the design difficulty of the low pass filter 16. Furthermore, there is no obvious advantage to adjust the current signal Sa′ generated by the charge pump 14 to have a pulse wave format, and indeed such a format may cause the control signal Scon′ of the voltage-controlled oscillator 18 to include ripple signals (indicated by arrows in FIG. 2 at time points t1, t2 . . . t4).